FPGA Design Lead - BLR

Bangalore Avecas Technologies RTL Design 6+ yrs
Full-time

Job Description

Lead FPGA prototyping for SoC designs on Xilinx Versal and Intel Agilex. Manage FPGA lab infrastructure.

Required Skills

Vivado Quartus Versal Agilex DDR5 PCIe Gen5
Domain
RTL Design
Location
Bangalore
Type
Full-time
Posted
May 19, 2026

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