Staff Verification Engineer - HYD

Hyderabad Avecas Technologies Design Verification 10+ yrs
Full-time

Job Description

Drive chip-level verification closure for production SoCs. Own methodology, regression, and silicon-quality signoff.

Required Skills

UVM Formal Coverage Regression Signoff Leadership
Domain
Design Verification
Location
Hyderabad
Type
Full-time
Posted
Apr 24, 2026

Apply Now

Fill in your details below to apply for this position
Back to All Jobs

Our Global Presence

Delivering VLSI excellence from five strategic locations worldwide

🇮🇳
Hyderabad, Telangana
India  ·  Headquarters
4th Floor, Radhe Heights,
Madhapur, Hyderabad 500081
🇮🇳
Bangalore, Karnataka
India
Design Center,
Bangalore 560001
🇺🇸
Sheridan, Wyoming
United States
30 N Gould St Ste R,
Sheridan, WY 82801
🇬🇧
Suffolk, England
United Kingdom
82A James Carter Road,
Mildenhall, Suffolk, IP28 7DE
🇲🇾
Penang
Malaysia
VLSI Design Center,
Penang, Malaysia