Memory Design Engineer - US

San Jose Avecas Technologies Analog Design 7+ yrs
Full-time

Job Description

Design SRAM compilers and custom memory arrays for 3nm FinFET. Optimize bitcells for density, speed, and yield.

Required Skills

SRAM Memory Compiler Bitcell Characterization Liberty
Domain
Analog Design
Location
San Jose
Type
Full-time
Posted
Jun 14, 2026

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