Showing 21–40 of 165 positions
Package Design Engineer - US
Cadence APD
Ansys
FCBGA
2.5D
3D-IC
Chiplet
TSV
Design advanced 2.5D/3D IC packages including chiplet integration, TSV, and fan-out wafer-level packaging....
VLSI Design Engineer - Malaysia
Verilog
SystemVerilog
UVM
Synthesis
FPGA
SoC Design
Work on RTL design and verification for consumer and automotive SoC projects. Collaborate with global teams on multi-site chip development....
Emulation Engineer - BLR
Palladium
Veloce
Emulation
Compile
Runtime Optimization
Set up Palladium/Veloce emulation environments. Optimize design partitioning and enable pre-silicon software development....
Analog Design Engineer - Bangalore
Spectre
Virtuoso
PLL
ADC
LDO
Bandgap
FinFET Analog
Design PLLs, ADCs, LDOs, and power management IPs for SoC integration at advanced FinFET nodes. Run Spectre simulations and support layout....
CAD/EDA Engineer - UK
Tcl
Python
Synopsys
Cadence
Linux
Flow Development
Maintain and develop EDA tool flows for UK design center. Evaluate new tools and provide methodology support....
CDC/RDC Verification Engineer - UK
Spyglass CDC
Conformal CDC
Synchronizers
RDC
Perform clock and reset domain crossing verification for multi-clock SoC designs targeting automotive applications....
Mixed-Signal Verification Engineer - UK
Xcelium AMS
RNM
Mixed-Signal
ADC/DAC Verification
Verify mixed-signal designs using AMS co-simulation. Bridge analog-digital verification for automotive IPs....
Low Power Design Engineer - UK
UPF
Power Gating
DVFS
Retention
Multi-VDD
Implement UPF multi-voltage strategies for IoT and wearable SoCs. Optimize for ultra-low power consumption....
FPGA Design Engineer - Malaysia
Vivado
Quartus
Verilog
VHDL
DDR
PCIe
Implement designs on Xilinx and Intel FPGAs for SoC prototyping and production FPGA products....
Junior Verification Engineer - BLR
Verilog
SystemVerilog
UVM basics
Digital Design
Entry-level DV for 0-2 years. Write UVM testbenches and run simulations under senior engineer mentorship....
Mixed-Signal Verification - HYD
Xcelium AMS
VCS AMS
RNM
ADC/DAC Verification
Verify AMS designs using co-simulation environments. Bridge analog-digital verification for data converter IPs....
Analog IC Designer - HYD
Spectre
Virtuoso
ADC
DAC
Voltage Reference
Industrial
Design high-precision ADCs, DACs, and reference circuits for industrial and automotive applications....
Place and Route Engineer - Malaysia
Innovus
ICC2
Placement
Routing
DRC
Tcl
Execute automated PnR for digital blocks. Drive placement, routing, and DRC closure with timing optimization....
Technical Recruiter - BLR
LinkedIn Recruiter
ATS
VLSI Domain
Screening
Source VLSI professionals for Bangalore center. Screen candidates, manage ATS, and coordinate with hiring managers....
Mixed-Signal Verification Engineer
Xcelium AMS
VCS AMS
RNM
Mixed-Signal
ADC/DAC Verification
Verify mixed-signal designs using real-number modeling, AMS co-simulation environments. Bridge analog-digital verification gap....
FPGA Prototyping Engineer
Vivado
Quartus
Versal
Agilex
DDR5
PCIe Gen5
Deploy SoC prototypes on Xilinx Versal and Intel Agilex FPGAs. Enable early software development and hardware validation....
SoC Integration Lead - BLR
AMBA ACE/AXI
SoC Integration
TrustZone
Performance
Lead SoC top-level integration including CPU, GPU, NPU, and peripherals. Manage bus architecture and address maps....
Physical Verification Lead - BLR
Calibre
IC Validator
DRC
LVS
PV Automation
Lead PV team for production tapeouts. Own DRC/LVS/ERC signoff quality and develop automated PV flows....
Analog Layout Engineer - Malaysia
Virtuoso
DRC
LVS
Matching
Shielding
ADC Layout
PLL Layout
Design analog/mixed-signal layouts for power management and data converter IPs. Ensure DRC/LVS clean layouts with optimized matching....