Showing 141–160 of 165 positions
Senior PD Engineer - Malaysia
Innovus
ICC2
PrimeTime
FinFET
CTS
Routing
Lead PD for consumer SoC designs at 7nm. Drive floorplanning, CTS, routing, and timing closure for Malaysian design center....
Physical Verification Engineer - MY
Calibre
DRC
LVS
ERC
Antenna
Metal Fill
Perform DRC, LVS, ERC checks using Calibre. Debug violations and ensure tapeout-ready quality....
DFT Engineer
DFT Compiler
TetraMAX
Tessent
Scan
ATPG
MBIST
JTAG
Implement scan insertion, ATPG, MBIST, and boundary scan for SoC designs. Analyze test coverage, optimize patterns, and coordinate with foundry....
Physical Verification Engineer
Calibre
IC Validator
DRC
LVS
ERC
Metal Fill
Tapeout
Perform DRC, LVS, ERC, and antenna checks using Calibre or IC Validator. Debug violations, create waivers, and ensure tapeout-ready quality....
Functional Safety Engineer
ISO 26262
IEC 61508
FMEDA
FTA
ECC
Lockstep
ASIL-B/D
Implement ISO 26262 functional safety for automotive ASICs. Perform FMEDA/FTA, define safety mechanisms, drive ASIL certification....
Senior DFT Lead
DFT Compiler
Tessent
Scan Compression
MBIST
JTAG
Leadership
Lead DFT implementation for complex SoCs. Define architecture, manage team of 3-5 engineers, drive 98%+ scan coverage....
Timing Closure Engineer
PrimeTime
Innovus
ICC2
ECO
MCMM
SI-aware STA
Signoff
Drive timing closure from synthesis to signoff. Handle ECO generation, MCMM optimization, and SI-aware timing analysis for tapeout....
Emulation Engineer
Palladium
Veloce
Emulation
Speed Adapters
TLM
SoC Validation
Set up Palladium/Veloce emulation for SoC pre-silicon validation. Optimize design partitioning and enable early software development....
Package Design Engineer
Cadence APD
Xpedition
FCBGA
Flip-Chip
RDL
2.5D/3D Packaging
Design IC packages including substrate, bump assignment, RDL routing, and thermal analysis for flip-chip and fan-out packages....
Embedded Software Engineer
C
C++
ARM Assembly
JTAG
SoC Peripherals
Boot ROM
Firmware
Develop firmware and bare-metal drivers for chip validation. Write diagnostic tests, debug hardware/software interactions using JTAG, and develop boot ROM....
RTL Design Engineer
Verilog
SystemVerilog
Design Compiler
Genus
AMBA AXI
Lint
CDC
Develop synthesizable RTL in Verilog/SystemVerilog for digital IP blocks. Perform lint/CDC analysis, implement micro-architecture specifications, and debug synthesis issues....
Test Engineer - Silicon Validation
ATE
Teradyne
Advantest
Silicon Debug
Shmoo
Characterization
Post-silicon validation including functional testing, characterization, benchmarking, and silicon debug using ATE platforms....
SoC Integration Lead - UK
SoC Integration
Cross-geography
AMBA
IP Integration
Customer
Lead SoC integration from Suffolk UK office. Coordinate global design teams across India, US, and UK for chip integration....
Application Engineer - EDA
EDA Tools
ASIC Flow
Demos
Benchmarking
Customer Support
Pre/post-sales EDA tool support. Conduct demos, benchmarks, training sessions, and develop application notes for design teams....
Senior RTL Design Lead
SystemVerilog
Micro-architecture
Team Leadership
Synthesis
Lead RTL team for SoC subsystem development. Drive micro-architecture, coding guidelines, and synthesis handoff. Manage 4-6 designers....
CDC/RDC Verification Engineer
Spyglass CDC
Conformal CDC
Synchronizers
RDC
Metastability
Clock and reset domain crossing verification. Ensure multi-clock SoC designs are metastability-free and functionally correct....
ASIC Verification Intern
Verilog
SystemVerilog basics
Digital Design
Simulation
6-month internship for final-year students. Learn UVM methodology, write testbenches, run simulations. Full-time conversion possible....
Chip Lead - Full Chip PD
Full Chip PD
Innovus
ICC2
Tapeout
Signoff
ECO
Team Coordination
Own full-chip physical design from floorplan to tapeout. Coordinate block PD, integration, and signoff for production SoCs....
RISC-V Design Engineer
RISC-V
Processor Design
Pipeline
SystemVerilog
ISA Extensions
Design RISC-V processor cores (RV32/RV64). Implement custom ISA extensions, optimize pipeline, and integrate into SoC platforms....